Ampac FireFinder PLUS Specifications Page 24

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Page 18
EN54 FIREFINDER PLUS INSTALLATION,COMMISSIONING & OPERATION
4.9 Main Board
The Main Board (BRD86MBA) carries the devices for interconnecting to all the other Boards, a
buzzer for auditory indication, the backlight power supply for the LCD and CPU Reset.
The Main CPU is mounted on this board and connected to it by CN11. The main connection board
then provides interfacing to
Up to 3 Slave CPU’s (Slave CPU 1 is onboard)
A printer
A Modem
An Expansion Panel
An Internal serial bus
An External communication bus.
Connections
CN1
Extra Control (Not Fitted)
CN15
Slave CPU connection
CN2
Expansion Panel
CN16
Printer 27VDC Out
CN3
Expansion LED’s (Not Fitted)
CN17
To LCD Backlight supply
CN4
Front Keypad
CN18
External Loop Communication
CN5
Printer
CN19
LCD Characters
CN6
Key Switch (Not Fitted)
CN20
RS485 Communications Port 1
CN7
Brigade Output
CN21
RS485 Communications Port 2
CN8
Modem and RS232 Comms
CN22
To LCD Backlight supply
CN9
External Buzzer Output
CN23
Slave CPU Debug (Not Fitted)
CN10
Slave CPU output 1
CN24
Jtag Programming Slave CPU1 (Not Fitted)
CN11
Main CPU
CN25
USB Programming
CN12
LCD Graphic
CN26
27VDC In
CN13
Slave CPU connection
CN27
Comms 2 RS232
CN14
Slave CPU connection
CN28
27VDC In (not fitted)
OUT
BUZZER
INHIBIT
BUZZER
RS485 EOL
+5V
0V
PRINTER 27V
SLAVE 1
USB
DEBUG
JTAG
DEBUG
TERMINATION BOARD
1
NODE ADDRESS
NETWORK LOOP COMMS
PSU MONITOR
PRINTER
CN 12
RESET
27V IN
COMMS1 RS232/MODEM (BOTTOM)
EXPANSION PANEL
EXPANSION LEDS
FRONT PANEL
BRIGADE I/F
23
4
BACKLIGHT
CN 19
EXPANSION
EXTRA CONTROLS
KEY SWITCH
EXPANSION
SLAVE 2
SLAVE 3
SLAVE 4
MODULE
MODULE
BRD86MBA4-
30/06/10
LCD BAC KLIGHT INVERTER
COMMS2 RS232 (TOP)
RS232
COMMS 2
27V IN
BACKLIGHT
GRAPH LCD
CHAR LCD
CHINESE
NON-CHINESE
GRAPH LCD
C91
RN19
RN18
RN17
RN16
R67
CN26
C90
C89
CN8
U36
U35
R66
R65
R64
R63
R62
Q8
Q6
CN 27
C88
C87
C86
C85
R4
CN11
ZDN2
ZDN1
U28
R51
R52
R53
R28
R24
R17
R22
R21
R50
R49
R39
R18
R40
R37
R38
R35
R36
R33
R19
R34
Q2
LK1
CN 25
CN 24
CN 23
C12
C15
C13
C50
C77
C75
C73
C55
C51
CN 17
U10
U16
R16
R12
R15
R9
C78
C76
CN 13
CN 15
CN 10
CN4
RN10
RN9
RN3
RN7
R59
R60
RN4
87654321
SW2
Q3
Q1
R10
R5
C61
U24
U32
U34
C19
C53
C11
C28
C10
C71
C24
R31
R48
R47
R46
R41
R45
R44
R43
R42
C27
C65
C66
C62
C63
C58
C26
C69
C56
C39
C52
C59
C68
C45
C44
C43
C38
C49
R27
R23
R30
R25
C21
C70
CN 18
RN15
RN2
RN14
RN13
RN12
R29
C72
C33
C34
CN 14
CN9
CN 16
C29
R20
X1
U26
U6
U5
U18
U15
U12
U23
U19
U27
RN8
D7
Q4
Q5
CN7
CN2
CN5
+
BZ1
U17
U22
SW1
U13
U33
U31
RN11
C79
D13
D14
D10
D11
D17
D12
D15
D16
C23
C30
C32
C57
C42
C74
C37
C18
U4
C9
C64
C40
CN3
C46
U14
C25
C35
D5
U21
C48
C47
C60
U25
C67
D6
U29
C36
C31
C83
R26
C81
C80
D8
U20
D4
R32
RN6
CN1
RN5
C41
U9
C5
C16
LK3
R14
R8
R11
U11
U30
C1
L2
C84
C54
C2
C3
C7
C4
C6
D1
L1
R6
R1
R3
R7
R13
U1
R61
C20
C17
C22
CN 20
D3D2
R56
RN1
TH1
U8
U3
U2
U7
CN21
C82
LK2
TP5
TP3
TP6
TP4
N1236
C8
C14
D9
R58
R54
R57
R55
R2
HY1
CN 28
CN6
CN12
CN19
CN100
CN22
TP69
Figure 16: Main Board Layout with no Main CPU or Slave CPU’s
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